Data Structures |
| struct | _dma_desc |
| | [XSP3_DMA_DESCRIPTOR] More...
|
| struct | DMAStream |
| | [XSP3_DMA_DESCRIPTOR] More...
|
| struct | XSP3_DMA_MsgBuildDesc |
| | [XSP3_DMA_STREAM] More...
|
| struct | XSP3_DMA_MsgBuildDebugDesc |
| | [XSP3_DMA_MSG_BUILD_DESC] More...
|
| struct | XSP3_DMA_MsgTestPat |
| | [XSP3_DMA_MSG_BUILD_DEBUG_DESC] More...
|
| struct | XSP3_DMA_MsgPrint |
| | [XSP3_DMA_MSG_TEST_PAT] More...
|
| struct | XSP3_DMA_MsgStart |
| | [XSP3_DMA_MSG_PRINT] More...
|
| struct | XSP3_DMA_MsgResend |
| | [XSP3_DMA_MSG_START] More...
|
| struct | XSP3_DMA_MsgPrintDesc |
| | [XSP3_DMA_MSG_RESEND] More...
|
| struct | XSP3_DMA_MsgCheckDesc |
| | [XSP3_DMA_MSG_PRINT_DESC] More...
|
| struct | XSP3_DMA_StatusBlock |
Defines |
| #define | XSP3_DMA_CMD_RESET 1 |
| | [XSP3_DMA_COMMANDS]
|
| #define | XSP3_DMA_CMD_CONFIG_MEMORY 2 |
| #define | XSP3_DMA_CMD_BUILD_DESC 3 |
| #define | XSP3_DMA_CMD_START 4 |
| #define | XSP3_DMA_CMD_BUILD_AND_START 5 |
| #define | XSP3_DMA_CMD_BUILD_TEST_TEST_PAT 6 |
| #define | XSP3_DMA_CMD_PRINT_DATA 7 |
| #define | XSP3_DMA_CMD_PRINT_SCOPE 8 |
| #define | XSP3_DMA_CMD_RESEND 9 |
| #define | XSP3_DMA_CMD_READ_STATUS 10 |
| #define | XSP3_DMA_CMD_BUILD_DEBUG_DESC 11 |
| #define | XSP3_DMA_CMD_PRINT_DESC 12 |
| #define | XSP3_DMA_CMD_CHECK_RX_DESC 13 |
| #define | XSP3_DMA_CMD_SET_MSG_PPC1 14 |
| #define | XSP3_DMA_CMD_SET_MSG_PPC2 15 |
| #define | XSP3_MBOX_MAGIC 0xF0123456 |
| | [XSP3_DMA_COMMANDS]
|
| #define | XSP3_MBOX_MAX_MSG 10 |
| #define | XSP3_DMA_MAX_POLL_PPC2 100000000 |
| #define | XSP3_DMA_ERROR_OK 0 |
| #define | XSP3_DMA_ERROR_UNKNOWN 1 |
| #define | XSP3_DMA_ERROR_BAD_COMMAND 2 |
| #define | XSP3_DMA_ERROR_BAD_STREAM 3 |
| #define | XSP3_DMA_ERROR_BAD_PAY_LOAD 4 |
| #define | XSP3_DMA_ERROR_UNCONF_DESC 5 |
| #define | XSP3_DMA_ERROR_UNCONF_BUFF 6 |
| #define | XSP3_DMA_ERROR_NOT_TX 7 |
| #define | XSP3_DMA_ERROR_NOT_RX 8 |
| #define | XSP3_DMA_ERROR_DESC_RANGE 9 |
| #define | XSP3_DMA_ERROR_DATA_RANGE 10 |
| #define | XSP3_DMA_ERROR_MSG_LEVEL 11 |
| #define | XSP3_DMA_STREAM_BNUM_DIRECT 0 |
| | No DMA stream specified, use absolute addresses.
|
| #define | XSP3_DMA_STREAM_BNUM_PLAYBACK 1 |
| | Use Playback DMA and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_BNUM_SCOPE0 2 |
| | Use Scope0 DMA (for scope streams 0:2) and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_BNUM_SCOPE1 3 |
| | Use Scope1 DMA (for scope streams 3:5) and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_BNUM_SCALERS 4 |
| | Use scalers DMA and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_BNUM_HIST_TO_DRAM 5 |
| | Use DMA for saving histogram addresses to DRAM and associated descriptors and memory buffer. Never used. Provided for debug only.
|
| #define | XSP3_DMA_STREAM_BNUM_DRAM_TO_10G 6 |
| | Use DMA Output FEM DRAM over 10 G Ethernet.
|
| #define | XSP3_DMA_STREAM_BNUM_10G_TO_DRAM 7 |
| | Use DMA filling FEM DRAM from 10 G Ethernet.
|
| #define | XSP3_DMA_STREAM_NUM (XSP3_DMA_STREAM_BNUM_10G_TO_DRAM+1) |
| #define | XSP3_DMA_STREAM_MASK_DIRECT (1<<XSP3_DMA_STREAM_BNUM_DIRECT) |
| | No DMA stream specified, use absolute addresses.
|
| #define | XSP3_DMA_STREAM_MASK_PLAYBACK (1<<XSP3_DMA_STREAM_BNUM_PLAYBACK) |
| | Use Playback DMA and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_MASK_SCOPE0 (1<<XSP3_DMA_STREAM_BNUM_SCOPE0) |
| | Use Scope0 DMA (for scope streams 0:2) and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_MASK_SCOPE1 (1<<XSP3_DMA_STREAM_BNUM_SCOPE1) |
| | Use Scope1 DMA (for scope streams 3:5) and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_MASK_SCALERS (1<<XSP3_DMA_STREAM_BNUM_SCALERS) |
| | Use scalers DMA and associated descriptors and memory buffer.
|
| #define | XSP3_DMA_STREAM_MASK_HIST_TO_DRAM (1<<XSP3_DMA_STREAM_BNUM_HIST_TO_DRAM) |
| | Use DMA for saving histogram addresses to DRAM and associated descriptors and memory buffer. Never used. Provided for debug only.
|
| #define | XSP3_DMA_STREAM_MASK_DRAM_TO_10G (1<<XSP3_DMA_STREAM_BNUM_DRAM_TO_10G) |
| | Use DMA Output FEM DRAM over 10 G Ethernet.
|
| #define | XSP3_DMA_STREAM_MASK_10G_TO_DRAM (1<<XSP3_DMA_STREAM_BNUM_10G_TO_DRAM) |
| | Use DMA filling FEM DRAM from 10 G Ethernet.
|
| #define | XSP3_DMA_STATE_DESC_CONF (1<<0) |
| #define | XSP3_DMA_STATE_BUFFER_CONF (1<<1) |
| #define | XSP3_DMA_STATE_DESC_BUILT (1<<2) |
| #define | XSP3_DMA_DEBUG_DESC_SMALL 1 |
| #define | XSP3_DMA_DEBUG_DESC_NEAR_PACKET 2 |
| #define | XSP3_DMA_DEBUG_DESC_INC_FRAME 4 |
| #define | XSP3_DMA_DEBUG_DESC_ALL_SMALL 0x10000 |
| #define | XSP3_DMA_MSG_CHECK_NONE 1 |
| | [XSP3_DMA_MSG_CHECK_DESC]
|
| #define | XSP3_DMA_MSG_CHECK_LENGTH 2 |
| #define | XSP3_DMA_MSG_CHECK_10GRX 4 |
| #define | XSP3_DMA_MSG_CHECK_FRAME_PER_DESC 8 |
| #define | XSP3_DMA_MSG_CHECK_1_FRAME 0x10 |
| #define | XSP3_DMA_MSG_TP_INC32 0 |
| | [XSP3_DMA_MSG_CHECK]
|
| #define | XSP3_DMA_MSG_TP_INC8 1 |
| #define | XSP3_DMA_MSG_TP_SLIDE 2 |
| #define | XSP3_DMA_MSG_TP_PLAYBACK 3 |
| #define | XSP3_DMA_MSG_PRINT_1COL (1<<0) |
| #define | XSP3_DMA_MSG_PRINT_DEC (1<<1) |
Typedefs |
| typedef struct _dma_desc | DMADesc |
| | [XSP3_DMA_DESCRIPTOR]
|
