[XSP3_GLOBAL_TIME_STATUS_A]
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Detailed Description
[XSP3_GLOBAL_TIME_STATUS_A]
Define Documentation
#define XSP3_GLOB_RST_GEN_A_ACTIVE_DELAY |
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(((x)&0x7F)<<22) |
Delay from Det reset to detector asserted to Global Reset Active sent to all cards. (can be 0).
#define XSP3_GLOB_RST_GEN_A_DET_RESET_WIDTH |
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x |
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(((x)&0x7F)<<4) |
Width in ADC clock cycles (80 MHz) of detector reset signal sent to the detector.
#define XSP3_GLOB_RST_GEN_A_ENB (1<<0) |
Enable Global reset generator.
#define XSP3_GLOB_RST_GEN_A_HOLD_OFF_TIME |
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x |
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(((x)&0x3FF)<<12) |
Hold off time in ADC clock cycles from END of detector reset pulse until next cheching for global reset request.
#define XSP3_GLOB_RST_GEN_A_SYNC_MODE |
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x |
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(((x)&3)<<1) |
0 => Drive Global reset as soon as requested. 1 => Syncronise global reset to beam using TTL_IN(3)
#define XSP3_GLOB_RST_GEN_B_ACTIVE_WIDTH |
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x |
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(((x)&0x3FF)<<0) |
Width of Global reset Active signal sent to all cards.
#define XSP3_GLOB_RST_GEN_B_CIRC_OFFSET |
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x |
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(((x)&0x7FF)<<12) |
Delay from beam circulation trigger to Detector Reset assertion.
#define XSP3_GLOB_RST_GEN_MAX_ACTIVE_DELAY 0x7f |
#define XSP3_GLOB_RST_GEN_MAX_ACTIVE_WIDTH 0x3ff |
#define XSP3_GLOB_RST_GEN_MAX_CIRC_OFFSET 0x7FF |
#define XSP3_GLOB_RST_GEN_MAX_HOLD_OFF 0x3ff |
#define XSP3_GLOB_RST_GEN_MAX_RESET_WIDTH 0x7f |