Defines

Number used to identify DMA streams controlled by PPC1 in the Virtex-5 FPGA.
[Macros to control the DMA engined in the FPGA.]

Defines

#define XSP3_DMA_STREAM_BNUM_DIRECT   0
 No DMA stream specified, use absolute addresses.
#define XSP3_DMA_STREAM_BNUM_PLAYBACK   1
 Use Playback DMA and associated descriptors and memory buffer.
#define XSP3_DMA_STREAM_BNUM_SCOPE0   2
 Use Scope0 DMA (for scope streams 0:2) and associated descriptors and memory buffer.
#define XSP3_DMA_STREAM_BNUM_SCOPE1   3
 Use Scope1 DMA (for scope streams 3:5) and associated descriptors and memory buffer.
#define XSP3_DMA_STREAM_BNUM_SCALERS   4
 Use scalers DMA and associated descriptors and memory buffer.
#define XSP3_DMA_STREAM_BNUM_HIST_TO_DRAM   5
 Use DMA for saving histogram addresses to DRAM and associated descriptors and memory buffer. Never used. Provided for debug only.
#define XSP3_DMA_STREAM_BNUM_DRAM_TO_10G   6
 Use DMA Output FEM DRAM over 10 G Ethernet.
#define XSP3_DMA_STREAM_BNUM_10G_TO_DRAM   7
 Use DMA filling FEM DRAM from 10 G Ethernet.

Define Documentation

#define XSP3_DMA_STREAM_BNUM_10G_TO_DRAM   7

Use DMA filling FEM DRAM from 10 G Ethernet.

#define XSP3_DMA_STREAM_BNUM_DIRECT   0

No DMA stream specified, use absolute addresses.

#define XSP3_DMA_STREAM_BNUM_DRAM_TO_10G   6

Use DMA Output FEM DRAM over 10 G Ethernet.

#define XSP3_DMA_STREAM_BNUM_HIST_TO_DRAM   5

Use DMA for saving histogram addresses to DRAM and associated descriptors and memory buffer. Never used. Provided for debug only.

#define XSP3_DMA_STREAM_BNUM_PLAYBACK   1

Use Playback DMA and associated descriptors and memory buffer.

#define XSP3_DMA_STREAM_BNUM_SCALERS   4

Use scalers DMA and associated descriptors and memory buffer.

#define XSP3_DMA_STREAM_BNUM_SCOPE0   2

Use Scope0 DMA (for scope streams 0:2) and associated descriptors and memory buffer.

#define XSP3_DMA_STREAM_BNUM_SCOPE1   3

Use Scope1 DMA (for scope streams 3:5) and associated descriptors and memory buffer.